Abstract: | This dissertation describes the realisation of a Programmable Logic Device (PLD) programming tool, based on a dedicated computer language, the PLD Description Language (PDL). PDL is used, via its object classes, to build representations of the devices to be programmed as well as the logic designs to program. The PDL compiler makes use of graphs to represent both the device and the design; a heuristic-based matching process, and graph simplification and logic equation simplification mechanisms manipulate these graphs in order to generate output that can be understood by a PLD programming device.
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